# JIT Bitmap Text Rendering for RP2350 Microcontrollers A high-performance technique for rendering proportional bitmap text using just-in-time compilation. - **Source:** [Hacker News: Front Page](https://brifing.si/source/b07aa772-b1a0-4a76-aa18-719c6f9e2dde) - **Published:** 2026-11-08 - **Topic:** [technology](https://brifing.si/c/technology) - **Original article:** - **On Brifing:** https://brifing.si/s/7b54f1cd-a7c6-4461-806a-8bbcd2ecccd1 ## Project Context and Goals The vic-2350 project reimagines 80s home computing on an RP2350 board. To maintain a specific aesthetic, the developer chose bitmap fonts over antialiased alternatives for their crispness and efficiency. The goal is to achieve proportional spacing and kerning while maintaining high performance on hardware with only 520kB of SRAM. ## Race-the-Beam Rendering Strategy Instead of using a memory-intensive framebuffer, the developer employs a race-the-beam technique. This involves filling the video buffer scanline by scanline during output. This approach allows for greater visual richness and lower latency, but imposes a strict performance budget of approximately six cycles per pixel for the entire rendering process. ## Custom Assembly Language Implementation Standard Rust was insufficient for the required performance, leading the developer to write the renderer in symbolasm. This custom language is designed for high-performance Cortex-M33 programming. By generating machine code on the fly via a JIT compiler, the system achieves the speed necessary to meet the tight scanline timing constraints. ## Display List Architecture The renderer uses a double-buffered display list to manage objects. During each vsync, the application swaps the list, which is then sorted by vertical position. The renderer maintains an active list of objects intersecting the current scanline, ensuring that only relevant objects are processed, which optimizes memory and CPU cycles. ## Memory-Efficient Text Objects Text objects store strings as single bytes per character to save precious RAM. The JIT compiler expands these strings into executable code and a 1-bit-per-pixel intermediate buffer. This buffer is subsequently expanded to 16-bit RGB 565 format, a process that runs at a sustained rate of 1.75 cycles per pixel. ## Optimized Font Packing The font bitmap is packed to ensure no glyph straddles a 32-pixel boundary, allowing single-load access. The algorithm also detects overlapping glyphs, reducing the total font bitmap size from 1140 to 960 bytes. This compactness is essential, as the font must reside in SRAM to prevent stalls during video-rate rendering. ## JIT Code Generation Tricks The JIT compiler generates ARM assembly to render glyphs. To minimize cycle costs, the developer reorders instructions to fill result-use delay slots between load and extraction operations. This optimization reduces the cycle cost per glyph from four to three, significantly improving the overall throughput of the text rendering pipeline. ## Inner Loop Performance Analysis The core rendering loop executes in 23 cycles per glyph. Including the JIT compilation and bitmap generation, the entire process consumes approximately 2.6% of the RP2350 core throughput. This efficiency is critical, as it leaves the majority of the processor's capacity available for other application functions and graphical object rendering. ## Comparison to Existing Solutions While direct comparisons are difficult, similar projects like dvhstx spend roughly 2 to 2.5 cycles per pixel. However, those projects are often limited to smaller grids and lower color bit depths. The vic-2350 implementation maintains high performance while supporting more flexible, proportional text rendering at a higher color depth. ## Efficient Kerning Mechanism To achieve professional-looking proportional text, the developer implemented a simple, fast kerning system. Each glyph uses two bitvectors representing its left and right sides. Kerning is calculated by performing a dot product of these vectors, which is evaluated during the display list build phase rather than during the scanline rendering. ## Deterministic Scratch Allocation The renderer uses a specialized, deterministic bitmap allocator for scratch space. This ensures that memory management does not introduce unpredictable delays during the time-critical rendering phase. By pre-allocating necessary resources during the start method of each display object, the system maintains consistent performance throughout the entire video scanout process. ## Future Potential and Impact This JIT-based rendering technique is highly versatile and could be applied to framebuffer-based systems as well. By prioritizing RAM efficiency and cycle-accurate assembly, the project demonstrates that modern microcontrollers can handle sophisticated text rendering tasks. This approach provides a blueprint for high-performance graphics on resource-constrained embedded systems in the future. ## Sources covering this story - https://linebender.org/blog/jit-bitmap-text/ — --- _Summary written by Brifing from the original reporting. Copyright in the original article belongs to its publisher; read the full piece at the link above._